ABSTRACT
The switched-capacitor-based cascaded multilevel inverters (CMI) have been emerging due to their voltage boosting capability. Unfortunately, they suffer from impulse charging current and non uniform operation. This article presents a topology termed as dual-T-type five-level CMI to resolve these problems without compromising the desirable voltage boosting characteristic. The main idea is to integrate a half bridge and an inductor to soft charge a capacitor that is connected in series with the dc source. The capacitor enables the voltage gain boosted to two, while the control of eight power switches that constitutes a dual-T structure enables five voltage levels generation. In addition, uniform operation is achieved for cascaded extensions. The proposed system is simulated in MATLAB/Simulink software.
INTRODUCTION
In the last decades, multilevel inverters have been extensively researched in view of the continuous development of power devices and the fast growing need for emerging applications such as microgrid. The conventional topologies, i.e., neutral-point-clamped inverter, flying capacitor inverter, and cascaded H-bridge (CHB) inverter have been proven as mature solutions for industrial applications. However, this does not hinder continuous research effort in contributing new promising topologies to offer wider possibilities in multilevel inverter technology. Being one of the most well-established multilevel inverters that has been successfully commercialized, CHB inverter stands out due to its attractive modularity feature. Significant interest has been garnered in the development of alternative modules in place of H-bridge for improved performance. To date, various types of cascaded multilevel inverters (CMI) have been proposed in literature. Most of them are based on the concept of switched dc source, where each of its isolated dc source is controlled by a half bridge to generate unipolar voltage levels across the dc link. Bipolar output voltage is achieved by controlling an H-bridge connected across the dc link. This topology is therefore termed as multilevel dc-link inverter. In a similar topology, a T-type inverter has been proposed as a replacement for the H-bridge. In the recent works, considerable attention has been focus on developing cascaded modules by utilizing T-type inverter. An E-type module that combines a T-type inverter, a half bridge, and four additional power switches is presented. With four asymmetrical dc sources, 13 voltage levels can be generated. A slight modification can further increase the number of levels to 17 by replacing the half bridge with a T-type inverter to constitute a two back-to-back T-type inverters structure. Despite not being mentioned in the literature, it is found that the ratio of asymmetrical dc sources is extended from 2Vdc:Vdc to 3Vdc:Vdc, which aggravates the power balancing issue. Similar topologies based on back-to-back T-type inverters are also presented. The module can be extended by enclosing more T-type inverters. Alternatively, proposes to extend the module to a switch-ladder structure by connecting more dc sources in series. Optimal design of this topology has validated its lowest power switch count compared to other cascaded modules. While the freewheeling current during dead-time commutation is not taken into account in the design, this topology is suffering from voltage spikes during transition between voltage levels. All the aforementioned modules require the same number of dc sources as that in CHB due to their limited voltage gain. To address this problem, switched-capacitor (SC) based CMI (SC-CMI) are established. Self-voltage balancing and voltage boosting are two distinctive benefits of SC-CMI. The former is achieved by charging the SCs in parallel with the dc source, while the latter is achieved by discharging the SCs in series with the dc source. However, these advantages come at the expense of the impulse charging current issue, hindering the implementation of this topology in practical applications. In addition, nonuniform operation of SC-CMIs is also a challenge that does not fulfill the modularity characteristic of CMI.

Block Diagram